ICRC Seminar - 13.5.15
You are Cordially Invited to the ICRC seminar.
Speaker: Prof. Andrew Myers, Cornell University.
Title: Controlling information channels across the software/hardware boundary
Modern computing systems are rife with information channels that can lead to violations of security and privacy. Language-level mechanisms - static verification and run-time checking -- can control some of these channels. However, some channels -- notably, timing channels -- exist below the software level of abstraction. Therefore, we are developing a whole-stack approach to security in which the flow of information is controlled at the software level, at the hardware level, and across the software-hardware boundary. This work has three key ideas. First, a rigorous software-hardware contract ensures that when statically checked code is run on compliant hardware, all information flows in the combined system are secure. This contract exposes to the software layer just enough about the behavior of hardware to ensure this compositional property. Second, we introduce a new method for building secure hardware satisfying that contract. Our new hardware description language SecVerilog adds dependent information flow types to Verilog, enabling low-overhead verification of efficient, secure hardware designs. Third, we introduce a way to dynamically mitigate the flow of information through timing channels, for cases where some leakage is unavoidable. This mechanism, predictive mitigation, can be employed at both the software and hardware levels.
Joint work with Danfeng Zhang, Aslan Askarov, Ed Suh, and Yao Wang.
Schreiber Building, Room 309
